High-resolution analog-to-digital converters are realized using a delta-sigma modulator (DSM). However, the intrinsic memory present in the delta-sigma ADC due to the signal transfer function of the modulator, and the decimation filter prevents it from being used as a multi-channel ADC. The conventional solution to this problem is to use an incremental delta-sigma ADC, where the memory elements in the ADC are reset before the start of every conversion cycle. However, this intermittent operation reduces the achievable signal-to-quantization noise ratio(SQNR), and signal-to-noise ratio(SNR). This work proposes new techniques that let a continuously running delta-sigma ADC to perform multi-channel analog-to-digital conversion without reset. First, it is shown that, using a sample-and-hold operating at the Nyquist rate before a delta-sigma ADC, makes the overall system linear-time-invariant. This enables the use of an equalizer with the inverse transfer function so that the overall system is now memoryless. In order to track the variations in the analog transfer functions of the sample-and-hold and that of the modulator, the equalizer is made adaptive. A new method is then proposed, where it is shown that, for a two-channel ADC, to void cross-talk at the output, instead of an equalizer that enforces an overall flat frequency response, it is both sufficient and necessary to ensure that the overall frequency response is symmetric about a radian frequency of pi/2. This is possible by using the proposed pi-shifted filter. this filter consumes a lower power than the adaptive equalizer. Another new method is then proposed that eliminates the front-end sample-and-hold. With this method, any existing delta-sigma ADC can be converted to a multi-channel ADC only by adding the proposed "modulated-sinc-sum" digital filter at the output. The advantage of this method is that, it neither requires any changes to be made to the deltasigma nor does it require any extra analog blocks. All of the above techniques are experimentally demonstrated with integrated circuits designed in a 180nm process.