Pseudo-logarithmic signal-strength indicators are usually realized using a chain of amplifiers with amplitude detectors at the output of each stage and summing the output of the amplitude detectors. In this work it is shown that the same can be achieved by measuring the total supply current of a pseudo-differential self-biased CMOS inverter chain. CMOS inverters act as amplifiers, and their supply current indicates the input amplitude. Amplification and amplitude detection are combined in the same block. The supply current is measured by mirroring the current in the pass transistor of the regulator that is used to power the inverter chain. Noise floor is set by the initial stages of the chain.
A 65 nm prototype has a 70 dB dynamic range with ±1 dB error. It occupies 0.08 mm2 and consumes 1.2 mW from 1.5 V. The input referred noise floor is 0.2 mV rms.