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ON-state Simulation and OFF-state Design of the Silicon Carbide Double-Implanted Power MOSFETs

ON-state Simulation and OFF-state Design of the Silicon Carbide Double-Implanted Power MOSFETs

Date19th Aug 2020

Time03:00 PM

Venue Google Meet

PAST EVENT

Details

We have investigated off-state Design of the 4H- Silicon Carbide Double Implanted Power MOSFET. Prior work on Silicon Carbide (SiC) power devices has been silent on the exact procedure to be employed for designing the Floating Field Rings (FFRs) meant for raising avalanche breakdown voltage of these devices. On the other hand, prior procedures for designing FFRs in Si devices do not work for kV range breakdown associated with SiC devices, and employ 10s of μm long rings. We propose a systematic procedure for deriving the number and spacing of the FFRs of any ring length required for achieving an arbitrary breakdown voltage. The procedure is demonstrated considering 1.75.5kV 4H-Silicon Carbide devices and a 700V Si device reported in literature. The FFR structures resulting from our procedure are found to have a total length which is 24.575% of that published in literature, and breakdown voltage which is more than 92% of the plane parallel value.

Speakers

Jaikumar M G (EE08D018)

Electrical Engineering